flink-project

Universal Serial Interface to FPGA's

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flink_first_steps

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flink_first_steps [2015/03/27 17:13] – [Processor Side] ursgrafflink_first_steps [2018/01/30 11:50] (current) – [FPGA Side] sfink
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 [{{ ..:devprocessfpga.png?250 | //Development process for the configuration of the FPGA. //}}] [{{ ..:devprocessfpga.png?250 | //Development process for the configuration of the FPGA. //}}]
 The VHDL modules can be found in [[flink_vhdl|flink VHDL]]. The blue boxes denote automatically created files. The red boxes symbolise planned components which are not yet available. For the time being you have to manually configure your VHDL project. \\ The VHDL modules can be found in [[flink_vhdl|flink VHDL]]. The blue boxes denote automatically created files. The red boxes symbolise planned components which are not yet available. For the time being you have to manually configure your VHDL project. \\
-Currently we only support Altera FPGA with its associated IDE (Quartus II). +Currently we support Altera and Xilinx FPGAs with its associated IDE (Quartus II, Vivado 2016.1 or newer). 
  
 ===== Processor Side ===== ===== Processor Side =====
flink_first_steps.1427472813.txt.gz · Last modified: 2016/02/25 13:32 (external edit)

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